1. Field of the Invention
The present invention relates to an ATM (Asynchronous Transfer Mode) communication control device for performing the processing of a subordinate (lower layer) portion of an ATM protocol between a terminal and an ATM network, and an ATM controller which shares the processing in the device.
2. Description of Related Art
In an ATM network, communication is performed according to an ATM protocol between an ATM communication control device and plural terminals which are connected to the ATM communication control device through lines. The ATM communication control device serves to share various kinds of processing of a subordinate (lower layer) portion of the ATM protocol to divide a variable-length packet generated at a terminal into fixed-length cells and then transmit the fixed-length cells to a line, and also serves to generate a packet on the basis of cells received through a line and deliver the packet thus generated to a terminal. The ATM protocol is being standardized by an ATM forum on the basis of the recommendation of the ITU (International Telecommunication Union).
There has been hitherto proposed an ATM controller which realizes, by an LSI, ATM layer processing for performing cell transmitting and receiving control and AAL (ATM Adaptational Layer) processing for performing call segmentation and reassembly (both kinds of processing are hereinafter referred to as xe2x80x9cATM protocol processingxe2x80x9d) of the processing of the ATM communication control device. For example, In xe2x80x9cxcexcPD98401xe2x80x9d described in NEC Technical Report (Vol. 47, NO. 7/1994), the ATM protocol processing is achieved by a wired logic whose processing procedure is fixed. According to this technique, the processing speed can be increased, however, the processing content cannot be altered. The ATM protocol contains some kinds of processing which have not yet been standardized, for example, processing for cells of a management system such as OAM (Operation Administration and Maintenance) cells, RM (Resource Management) cells used to protect the network and the end system from congesting, etc. Therefore, the ATM controller is preferably designed to support the alteration of these non-standardized processing.
xe2x80x9cATMizerxe2x80x9d as described in Nikkel Electronics (Apr. 11, 1994, No. 605, pp.17-18) is known as an ATM controller which is designed to support the alteration of the processing. This controller contains a microprocessor therein, and it achieves most of the ATM protocol processing containing an analysis work of a cell header, a cell segmentation/reassembly work, etc. by software processing. However, since the software processing needs a lot of overheads, this controller is equipped with a microprocessor having high performance and large scale, and the microprocessor is operated at high speed.
As described above, since the conventional ATM controller needs a microprocessor having high performance and large scale, a fine process technology is required in a manufacturing process, and thus the manufacturing cost thereof is high. Further, since the microprocessor must be operated at high speed, power consumption is also increased.
Nevertheless, at the setting time of a virtual connection (VC) which can be uniquely identified by VPI (Virtual Path Identifier)/VCI (Virtual Channel Identifier) in the ATM, QS (Ouality of Service) indicating, for example, how degree the cell delay variation is permitted (i.e., the maximum level of the permitted cell delay variation) In accordance with the type of traffic to be transferred on the virtual connection, and a cell rate can be required to the network and the end system. Actually, a category (class) to be used at the setting time of the VC is selected from four ATM service categories (CBR (Constant Bit Rate):fixed rate service, VBR (Variable Bit Rate): variable rate service, ABR (Available Bit Rate): service for varying the rate in accordance with the congestion of the network, UBR (Unspecified Bit Rate): unspecified and non-guaranteed service) which are defined as functions of the ATM layer, and a cell rate (transmission rate) is requested.
The ATM controller which is necessary to connect to ATM-I AN is required to individually transmit each cell every VC in accordance with a service category declared at the VC setting (signaling) time and at a transmission rate declared at the VC setting time.
The following two methods are known to perform a traffic shaping function which is supported by the existing ATM controller. According to one method, four rate queues are prepared in conformity to two priorities in a hardware, a peak rate is specified in conformity to the rate queue and plural VCs registered in the rate queue are accessed at the specified rate by a round robin system to transmit cells. According to another method, a table in which the order of VCs to transmit the cells is registered is prepared in advance on the basis of the cell rate of the whole VCs, and the table is accessed every fixed period in a hardware to transmit the cell corresponding to the registered VC.
An SARA chip produced by TransSwitch company is known as an ATM controller having the former traffic shaping function, and an ATM SAR chip (IDT77201) produced by Integrated Device Technology company is known as an ATM controller having the latter traffic shaping function.
However, in such a conventional device, in order to perform the transmit traffic control corresponding to a service category and a cell rate which are declared in conformity to a VC and also defined in the ATM protocol, it is needed to consider the cell rate in conformity to the VC by a driver of the ATM controller, and also it is needed to reconsider the schedule of the whole cell rate when a VC is set.
For example, as well known in the prior arts as described above, a table is required to be beforehand prepared for allotment of a peak rate to a rate queue and a schedule.
In general, in a network card for connection to ATM-LAN, the design is made so that no local processor for the driver of the ATM controller is mounted, so that in order to reduce the cost the traffic management corresponding to the VC must be performed in a CPU at the terminal side.
An object of the present invention is to provide an ATM controller and an ATM communication control device which can support the setting or alteration of the protocol processing, and reduce the load (overhead) of firmware processing.
Another object of the present invention is to provide an ATM controller and an ATM communication control device which flexibly support a traffic control which meets various service categories and cell rates which are defined in an ATM layer in the ATM controller.
Another object of the present invention is to an ATM controller and an ATM communication control device which perform a traffic shaping function meeting a cell rate declared in conformity to a VC by a hardware circuit and a firmware (MPU).
Another object of the present invention is to provide an ATM controller and an ATM communication control device which monitor a total traffic amount so as to prevent communication from congesting.
In order to attain the above objects, according to one aspect of the present invention, it is provided that an ATM controller which is connected to an external buffer memory and performs the processing of an ATM layer and an AAL layer of an ATM protocol between a cable and a terminal, includes transfer means for transmitting packet data between the terminal and the buffer memory, cell transmit control means for dividing the packet data from the terminal into data cells and transferring the divided data cells to an ATM network side, payload type judging means for checking a cell header received from the ATM network side to judge whether a cell concerned is a data cell, cell receiver control means for reassembling the data cell identified on the basis of the judgment result of the payload type judging means to generate packet data, and storing the generated packet data into the buffer memory, a program memory for storing and holding a firmware, and a microprocessor for analyzing cells other than the data cell identified on the basis of the judgment result and performing the processing corresponding to the analysis result in accordance with the firmware.
The ATM controller according to the present invention can support the setting or alteration of the ATM protocol processing which is allotted to the microprocessor by rewriting the firmware. Further, it is unnecessary for the microprocessor to identify the type of the cell (type of payload) and also to perform segmentation and reassembly of data cells, so that the firmware processing loads can be reduced.
Further, according to a second aspect of the present invention, an ATM communication control device for performing the processing of an ATM layer, an AAL layer and a PHY (Physical Layer Protocol) of an ATM protocol between a cable and a terminal, includes the mentioned ATM controller, a buffer memory which is connected to the ATM controller, a PHY controller for performing the processing of the PHY layer between the ATM controller and the cable, and a crystal oscillator for driving the PHY controller, the ATM controller being constructed by one chip LSI.
According to another aspect of the present invention, it is provided an ATM controller comprising, an interface circuit to a terminal, an interface circuit to a buffer memory for storing a cell and packet data to be communicated, an interface circuit to a PHY controller for connecting the ATM controller to ATM-LAN, a first data transfer means for transferring packet data between a memory of the terminal and the buffer memory, a second data transfer means for segmenting packet data in the buffer memory into cells and transmitting the cells, a third data transfer means for reassembling received cells into packet data on the buffer memory, an MPU, a memory for storing a firmware executed by the MPU, and a hardware circuit comprising a plurality of transmit managing means each provided for a virtual connection on which cells are communicated, for outputting a cell-transmit request when a time elapsed after a cell transmission on the virtual connection meets a time interval based on a cell rate preliminarily indicated for the virtual connection, and scheduling means for arbitrating transmitted cell-transmit requests and instructing the second data transfer means to transmit cells of the virtual connection corresponding to the cell-transmit request selected upon an arbitration.
The scheduling means may further arbitrate cell transmit requests from the MPU executing the firmware.
Preferably, each transmit managing means has means for changing a time interval for the corresponding virtual connection every time when a plurality of cell transmit requests are output through the corresponding virtual connection.
The ATM controller wherein the service categories may include at least one of the service categories in which a plurality of cell rates are set, and the ATM controller further preferably includes means for switching a cell rate for a virtual connection corresponding to a service category to another cell rate among said a plurality of cell rates in accordance with a total traffic amount in a communication on the total virtual connections, so as to prevent the communication from congesting.
The cell transmit controller has means for altering the cell rate every transmission of plural cells, and cell periodical transferring means.
In the cell transmit controller, the traffic shaping function corresponding to plural VCs can be performed. Further, the cell transmit rate can be altered every transmission of plural cells. A cell-transmit interval managing method may be selected from the cell transmission performed at a fixed period and the cell transmission performed in a fixed time from the completion time of the cell transmission.
Furthermore, the traffic shaping function for plural VCs can be performed both in the cell transmit controller and in the firmware executed in the MPU at the same time. The processing which is to be performed by the cell transmit controller and the firmware can be divided by cell types (payload types) such as a data cell and a management cell, or by a VC basis, for example, for which a high cell rate is declared and a low cell rate is declared.
The firmware which is executed in the MPU can calculate the cell-transmit interval which is matched to each VC and perform the transmit management of the management cell by merely declaring a parameter of a service type defined in the ATM protocol and a cell rate for each VC.
Furthermore, by monitoring the total cell rate during transmission is monitored, the cell rate can be reduced in accordance with the service category every VC when the total cell rate exceeds the transmission bandwidth of the cable.